Borga, Andrea

Predonzani, Mauro

FPGA remote slow control via UART 16550

## Hardware

### Buffering

Remember to add a voltage translator buffer:

**!! none of the FPGAs on the market is 12V tolerant !!**

~ use a MAX3224 chip for example

### Timing

In case an external clock is needed to drive the UART:

~ use a 29.4912 MHz Oscillator like ASV-29.4912MHZ-EJ-T


<h2 id="hardware">Hardware</h2>
<p><h3>Buffering</h3>

<p>Remember to add a voltage translator buffer:</p>
<b>!! none of the FPGAs on the market is 12V tolerant !!</b>

<p>~ use a MAX3224 chip for example</p>

<h3>Timing</h3>      

<p>In case an external clock is needed to drive the UART:</p>

<p>~ use a 29.4912 MHz Oscillator like ASV-29.4912MHZ-EJ-T</p>
</p>


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FPGA remote slow control via UART 16550

Hardware

Buffering

Timing